Modulator and correction method thereof

ABSTRACT

An object of the invention is to provide wideband modulator using a PLL synthesizer which can match the frequency characteristic and prevent degradation in modulation accuracy even in the presence of a variation in the manufacture of circuit components. In a wideband modulator which modulates the division ratio of a frequency divider by using a modulating signal generated by a modulating signal generator and outputs a modulated carrier signal from a VCO, first and second calibration data from a calibration data generator are input via a selector. The amplitude value of an ac component of each modulating signal appearing on the output of a loop filter or the amplitude value of an ac component of each modulating signal demodulated by a demodulator is converted to a digital value by way of an AID converter. The difference between the two is detected by error detection means and a control signal FCR to eliminate the difference is generated by frequency characteristic correction means in order to correct the frequency characteristic of a PLL or a pre-distortion filter.

TECHNICAL FIELD

The present invention relates to a modulator which is used in a radiounit and which generates and outputs a modulated carrier signal in awider frequency range than a frequency range of a PLL thus performingwideband modulation using a PLL frequency synthesizer, and a correctionmethod therefor.

BACKGROUND OF THE INVENTION

In general, a modulator circuit using a PLL synthesizer is required tobe low cost, low power consumption as well as good noise characteristicand modulation accuracy. In PLL-based modulation, to provide a bettermodulation accuracy, it is desirable to provide a wider frequency rangeof a PLL (PLL bandwidth) rather than a frequency range of a modulatingsignal (modulation bandwidth). However, there is a problem that,broadening the PLL bandwidth fails to suppress a noise from eachcomponent of the PLL thus inviting degradation in the noisecharacteristic.

In the related art, a technique is described in U.S. Pat. No. 6,008,703,which sets a narrower PLL bandwidth than a modulation bandwidth andpreviously amplifying (pre-distorting), with modulation data, themodulating signal component suppressed by the frequency characteristicof a PLL.

FIG. 14 is a substantially faithful reproduction of the configurationshown in FIG. 2A of U.S. Pat. No. 6,008,703. In FIG. 14, a phasecomparator 36, a loop filter 40, a voltage-controlled oscillator (VCO)26, and a multilevel frequency divider 30 constitute a PLL.

Digital modulation data contains a frequency component exceeding thecutoff frequency of a PLL. A digital compensation filter 46 is used toprovide digital modulation data with a characteristic inverse to thefrequency characteristic of a PLL and an adder 50 is used to overlay acarrier signal. Next, the output signal of the adder 50 is modulated bythe Σ Δ A modulator 56 and the resulting modulating signal is used tomodulate the multilevel frequency divider 30. A modulated carrier signalis thus output from the VCO 26.

(Referenced Patent Document) U.S. Pat. No. 6,008,703 (FIGS. 2A, 3A-3C,and 4)

When the above-mentioned technique is used, a flat gain characteristiccan be theoretically obtained in a frequency band exceeding a cutofffrequency of a PLL concerning a closed loop frequency characteristic ofa PLL. This should substantially broaden the PLL.

In case a PLL that is an analog circuit is formed into an integratedcircuit, resistor and capacitor values may vary depending on themanufacture of circuit components, and the frequency characteristic of aPLL may vary accordingly. Thus, the frequency characteristic of a PLL ischanged. On the other hand, the characteristic of a digital compensationfilter is not changed because it is fixed by filter coefficientdetermined at design. As a result, the frequency characteristic of a PLLand the frequency characteristic of a digital compensation filter do notmatch each other.

In reality, it is difficult to obtain a flat gain characteristic in afrequency range exceeding the cutoff frequency of a PLL.

Examination results conducted by the inventor of this application aredescribed in more details with reference to FIGS. 15 and 16.

FIG. 15 is a characteristic curve showing an ideal frequencycharacteristic in a related art circuit. The gain in the vertical axisin FIG. 15 is obtained by normalizing the gain in the frequency band ofthe PLL 6 to 0[db]. The closed loop frequency characteristic of the PLLis represented by the low-pass frequency characteristic of a cutofffrequency, similar to a characteristic curve A in FIG. 15. Thecharacteristic of the digital compensation filter 46 in FIG. 14 has afrequency characteristic represented by the inverse characteristic ofthe frequency characteristic of a PLL, similar to a characteristic curveB in FIG. 15.

The digital modulation data shown in FIG. 14 is a signal of a digitalvalue in the frequency band fBW. The digital modulation data undergoesamplification of a signal component in an area exceeding the frequencyband of the PLL 6 by way of the digital compensation filter 46 as adigital filter, and the amplified signal is used to modulate themultilevel frequency divider.

As a result, the frequency characteristic of a modulated carrier signaloutput from the VCO 26 in FIG. 14 is synthesized with the frequencycharacteristic of a PLL to form a flat frequency characteristic, asshown by a characteristic curve C shown in FIG. 15. Thus, it is possibleto perform modulation even in case the modulation bandwidth exceeds thebandwidth of a PLL (cutoff frequency), thereby providing both modulationaccuracy and good noise characteristic.

As mentioned earlier, in reality, it is difficult to obtain such a gaincharacteristic due to a reason such as a variation in the characteristicof circuit components of a PLL. For example, in case a PLL is formedinto an integrated circuit, resistor and capacitor values vary dependingon the manufacture of circuit components, and the frequencycharacteristic of a PLL varies accordingly.

FIG. 16 is a characteristic curve showing the frequency characteristicobtained in case the frequency characteristic of a PLL in a related artcircuit shown in FIG. 14 has varied.

In FIG. 16, a characteristic curve Ax shows a closed loop frequencycharacteristic of a PLL where the cutoff frequency has changed to fcx.It is assumed that the frequency characteristic of a digitalcompensation filter is unchanged from the design stage because it is adigital filter (characteristic curve B). Thus, the synthesized frequencycharacteristic is no longer flat, such as a characteristic curve Cxshown in FIG. 16.

In this way, a deviation is generated between the frequencycharacteristic of a PLL and the frequency characteristic of a digitalcompensation filter due to a variation in the manufacture of anintegrated circuit. This prevents a flat characteristic from beingobtained, which degrades the modulation accuracy.

The invention has been accomplished based on such examination resultsand has as an object to provide a modulator capable of performingwideband modulation using a PLL frequency synthesizer which can preventdegradation in modulation accuracy even in the presence of a variationin the manufacture of circuit components, and a correction methodtherefor.

DISCLOSURE OF THE INVENTION

A modulator according to the invention comprises a PLL including avoltage-controlled oscillator, a frequency divider and a phasecomparator, the modulator generating a modulating signal based on themodulation data having information on a wider bandwidth than thefrequency bandwidth of the PLL, setting the division ratio of thefrequency divider by way of this modulating signal, and outputting amodulated carrier signal from the voltage-controlled oscillator as wellas performing filtering processing by way of a pre-distortion filter onthe modulation data to provide a frequency characteristic inverse to thefrequency characteristic of the PLL in a process of generating themodulation signal, thereby allowing wideband modulation, wherein themodulator comprises error detection means for detecting a differencebetween an amplitude value in a frequency equal to or below the cutofffrequency of the PLL and an amplitude value in a frequency higher thanthe cutoff frequency concerning an a.c. component of the modulatingsignal appearing on a control terminal of the voltage-controlledoscillator, and frequency characteristic correction means for correctingat least one of the frequency characteristic of the PLL and thefrequency characteristic of the pre-distortion filter in a direction thedetected difference is eliminated.

With this configuration, it is possible to correct the frequencycharacteristic of a PLL or a pre-distortion filter. This correctioneliminates the deviation between the frequency characteristic of the PLLand that of the pre-distortion filter thus providing a flat gaincharacteristic even in a frequency band exceeding the cutoff frequencyof the PLL. As a result, it is possible to prevent degradation inmodulation accuracy even in the presence of a variation in themanufacture of circuit components.

The modulator according to the invention comprises a selector forselectively inputting, as the modulation data, first calibration data ona frequency equal to or below the cutoff frequency of the PLL and secondcalibration data on a frequency above the cutoff frequency of the PLL.

With this configuration, it is possible to predict the deviation betweenthe frequency characteristic of the PLL and that of the pre-distortionfilter thus assuring precise frequency correction.

A modulator according to the invention comprises: a PLL including avoltage-controlled oscillator for outputting a modulated carrier signal,a frequency divider for dividing the frequency of an output signal ofthe voltage-controlled oscillator by a modulated division ratio, a phasecomparator for comparing the phase of the output signal of the frequencydivider and the phase of a reference signal and outputting the phasedifference, a charge pump for converting the output signal of the phasecomparator to a voltage or a current, and a loop filter for performinglow-pass filtering of the output signal of the charge pump andoutputting the resulting signal to the voltage-controlled oscillator; amodulation data generator for generating and outputting modulation datahaving the information on a wider bandwidth than the bandwidth of thePLL; a pre-distortion filter which has a characteristic inverse to thefrequency characteristic of the PLL approximated and which filters themodulation data; division ratio modulation means for modulating theoutput signal of the pre-distortion filter and outputting the resultingoutput signal as a modulating signal used to set the division ratio ofthe frequency divider; and a pre-distortion filter frequencycharacteristic correction means for outputting a control signal forvarying the frequency characteristic of the pre-distortion filter.

With this configuration, it is possible to vary the cutoff frequency ofa pre-distortion filter even in the presence of a variation in thefrequency band of a PLL in order to correct the variation thuspreventing degradation in modulation accuracy.

The modulator according to the invention comprises a calibration datagenerator for generating and outputting, to the pre-distortion filter,first calibration data having the frequency information on the frequencyband of the PLL and second calibration data having the frequencyinformation on the band outside the frequency band of the PLL, whereinthe pre-distortion filter frequency characteristic correction meanscomprises: an A/D converter for converting to a digital signal theamplitude value of an ac component having the division ratio modulatedby the division ratio modulation means appearing on the output of theloop filter in response to the first and second calibration datarespectively; comparison means for comparing for comparing the data ofthe two amplitude values output from the A/D converter and outputtingthe difference information; and filter characteristic control means forvarying the characteristic of the pre-distortion filter in accordancewith the difference information output from the comparison means.

With this configuration, it is possible to readily detect a deviationbetween the frequency characteristic of a PLL and that of apre-distortion filter by comparing the amplitudes of ac componentscorresponding to the first and second calibration data appearing on theoutput of a loop filter.

Or, the modulator according to the invention comprises a calibrationdata generator for generating and outputting, to the pre-distortionfilter, first calibration data having the frequency information on thefrequency band of the PLL and second calibration data having thefrequency information on the band outside the frequency band of the PLLand a demodulator for demodulating the output signal of thevoltage-controlled oscillator, wherein the pre-distortion filterfrequency characteristic correction means comprises: an A/D converterfor converting to a digital signal the amplitude value of an accomponent having the division ratio modulated by the division ratiomodulation means appearing on the output of the loop filter in responseto the first and second calibration data respectively; comparison meansfor comparing for comparing the data of the two amplitude values outputfrom the A/D converter and outputting the difference information; andfilter characteristic control means for varying the characteristic ofthe pre-distortion filter in accordance with the difference informationoutput from the comparison means.

With this configuration, it is possible to readily detect a deviationbetween the frequency characteristic of a PLL and that of apre-distortion filter, by comparing the amplitude values of the outputsignals of a demodulator based on the idea that ac componentscorresponding to the first and second calibration data appearing on theoutput of the loop filter can be obtained also by demodulating theoutput signal (modulated carrier) of the voltage-controlled oscillator.

A modulator according to the invention comprises: a PLL including avoltage-controlled oscillator for outputting a modulated carrier signal,a frequency divider for dividing the frequency of an output signal ofthe voltage-controlled oscillator by a modulated division ration, aphase comparator for comparing the phase of the output signal of thefrequency divider and the phase of a reference signal and outputting thephase difference, a charge pump for converting the output signal of thephase comparator to a voltage or a current, and a loop filter forperforming low-pass filtering of the output signal of the charge pumpand outputting the resulting signal to the voltage-controlledoscillator; a modulation data generator for generating and outputtingmodulation data having the information on a wider bandwidth than thebandwidth of the PLL; a pre-distortion filter which has a characteristicinverse to the frequency characteristic of the PLL approximated andwhich filters the modulation data; division ratio modulation means formodulating the output signal of the pre-distortion filter and outputtingthe resulting output signal as a modulating signal used to set thedivision ratio of the frequency divider; and a PLL frequencycharacteristic correction means for outputting a control signal forvarying the current gain of the charge pump.

With this configuration, it is possible to vary the frequencycharacteristic of a PLL by controlling the current of the charge pumpand correct a variation in the frequency characteristic of a PLL andthat of a pre-distortion filter, thereby preventing degradation inmodulation accuracy.

The modulator according to the invention comprises a calibration datagenerator for generating and outputting, to the pre-distortion filter,first calibration data having the frequency information on the frequencyband of the PLL and second calibration data having the frequencyinformation on the band outside the frequency band of the PLL, whereinthe PLL frequency characteristic correction means comprises: an A/Dconverter for converting to a digital signal the amplitude value of anac component having the division ratio modulated by the division ratiomodulation means appearing on the output of the loop filter in responseto the first and second calibration data respectively; comparison meansfor comparing the data of the two amplitude values output from the A/Dconverter and outputting the difference information; and charge pumpcurrent control means for varying the current gain of the charge pump inaccordance with the difference information output from the comparisonmeans.

With this configuration, it is possible to readily detect a deviationbetween the frequency characteristic of a PLL and that of apre-distortion filter based on the output of a loop filter.

Or, the modulator according to the invention comprises a calibrationdata generator for generating and outputting, to the pre-distortionfilter, first calibration data having the frequency information on thefrequency band of the PLL and second calibration data having thefrequency information on the band outside the frequency band of the PLLand a demodulator for demodulating the output signal of thevoltage-controlled oscillator, wherein the PLL frequency characteristiccorrection means comprises: an A/D converter for converting to a digitalsignal the amplitude value of an ac component having the division ratiomodulated by the division ratio modulation means appearing on the outputof the loop filter in response to the first and second calibration datarespectively; comparison means for comparing for comparing the data ofthe two amplitude values output from the A/D converter and outputtingthe difference information; and charge pump current control means forvarying the current gain of the charge pump in accordance with thedifference information output from the comparison means.

With this configuration, it is possible to readily detect a deviationbetween the frequency characteristic of a PLL and that of apre-distortion filter based on the output of the demodulator(calibration signal component).

In another aspect, the filter characteristic control means comprises amemory for storing control data used to change the frequencycharacteristic of the pre-distortion filter.

With this configuration, it is possible to readily generate a controlsignal for the frequency characteristic of a pre-distortion filter byusing a control data lookup table stored in a memory such as a ROM. Thisdownsizes the circuit scale and reducing the overall cost.

In another aspect, the charge pump current control means comprises amemory for storing control data used to change the frequencycharacteristic of the PLL.

With this configuration, it is possible to readily generate a controlsignal for the current gain of a charge pump by using a control datalookup table stored in a memory such as a ROM. This downsizes thecircuit scale and reducing the overall cost.

In another aspect, a low-pass filter is provided having a higher cutofffrequency than the bandwidth of the modulating signal between the outputend of the loop filter and the input end of the voltage-controlledoscillator.

With this configuration, it is possible to reduce a noise in a higherfrequency band than the modulation band (a higher frequency band thanthe maximum frequency indicated by the modulation data) therebyimproving the noise characteristic.

In the above configuration, the first and second calibration data have asingle frequency information item.

With this configuration, a calibration signal (modulating signal forcalibration) has a single tone, which simplifies the comparisonprocessing in calibration. In other words, the correction error isreduced so that the modulation accuracy is improved.

In another aspect, in the pre-distortion filter frequency characteristiccorrection means, the comparison means compares the amplitude values ofan ac component having the division ratio modulated by the divisionratio modulation means appearing on the output of the loop filter inresponse to the first and second calibration data respectively,immediately after varying the output frequency of the voltage-controlledoscillator, and the filter characteristic control means varies thecharacteristic of the pre-distortion filter in accordance with thecomparison result.

With this configuration, it is possible to simultaneously vary thefrequency characteristic of a PLL and that of a pre-distortion filter.This improves the calibration accuracy thereby improving the modulationaccuracy.

In another aspect, the loop filter and the A/D converter are ac-coupledwith each other.

With this configuration, a need is eliminated to allocate the number ofbits of an AID converter to the dc component of a loop filter output,which improves the amplitude measurement accuracy of a calibrationsignal. Alternatively, it is possible to reduce the number of bits of anA/D converter which reduces the overall cost.

In another aspect, the modulator halts the operation of the A/Dconverter after varying the characteristic of the pre-distortion filter.With this configuration, it is possible to reduce the currentconsumption.

In another aspect, the modulator halts the operation of the demodulatorafter varying the characteristic of the pre-distortion filter. With thisconfiguration, it is possible to reduce the current consumption.

In another aspect, the pre-distortion filter is an IIR-type digitalfilter.

With this configuration, it is possible to provide a frequencycharacteristic having the amplitude and phase of a PLL by way of adigital filter, which improves the modulation accuracy.

A mobile radio unit according to the invention comprises a modulator ofany of the foregoing configuration. It is thus possible to improve themodulation accuracy of a transmit signal of a mobile radio unit.

A radio base station according to the invention comprises a modulator ofany of the foregoing configuration. It is thus possible to improve themodulation accuracy of a transmit signal of a mobile radio unit.

A correction method for a modulator according to the invention is amethod for correcting a modulator which generates a modulating signalbased on the modulation data having information on a wider bandwidththan the frequency bandwidth of the PLL, sets the division ratio of thefrequency divider by way of this modulating signal, and outputs amodulated carrier signal from the voltage-controlled oscillator as wellas performs filtering processing by way of a pre-distortion filter onthe modulation data to provide a frequency characteristic inverse to thefrequency characteristic of the PLL in a process of generating themodulation signal, thereby allowing wideband modulation, wherein themethod comprises an error detecting step of detecting a differencebetween an amplitude value in a frequency equal to or below the cutofffrequency of the PLL and an amplitude value in a frequency higher thanthe cutoff frequency concerning an ac component of the modulating signalappearing on a control terminal of the voltage-controlled oscillator,and a frequency characteristic correcting step of correcting at leastone of the frequency characteristic of the PLL and the frequencycharacteristic of the pre-distortion filter in a direction the detecteddifference is eliminated.

With this procedure, it is possible to match the frequencycharacteristic of a PLL and the frequency characteristic of apre-distortion filter. This provides a flat frequency characteristiceven in a frequency range exceeding the cutoff frequency of a PLL, whichprevents degradation in modulation accuracy.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing the configuration of a widebandmodulator using a PLL frequency synthesizer according to a firstembodiment of the invention;

FIG. 2 is an explanatory operation drawing which illustrates thespecific operation of calibration in the modulator according to thefirst embodiment;

FIG. 3 is an explanatory operation drawing which illustrates thespecific operation of calibration in the modulator according to thefirst embodiment;

FIG. 4 is a block diagram showing the configuration of a widebandmodulator using a PLL frequency synthesizer according to a secondembodiment of the invention;

FIG. 5 is a frequency characteristic graph which illustrates theoperation in the modulator according to the second embodiment;

FIG. 6 is a frequency characteristic graph which illustrates theoperation in the modulator according to the second embodiment;

FIG. 7 is a frequency characteristic graph which illustrates theoperation in the modulator according to the second embodiment;

FIG. 8 is an explanatory operation drawing which illustrates a deviationbetween the amplitude value of a modulating signal component above thecutoff frequency of a PLL and the amplitude value of a modulating signalcomponent equal to or below the cutoff frequency;

FIG. 9 is a block diagram showing the configuration of a widebandmodulator using a PLL frequency synthesizer according to a thirdembodiment of the invention;

FIG. 10 is a frequency characteristic graph which illustrates theoperation in the modulator according to the third embodiment;

FIG. 11 is a block diagram showing the configuration of a widebandmodulator using a PLL frequency synthesizer according to a fourthembodiment of the invention;

FIG. 12 is a block diagram showing the configuration of a widebandmodulator using a PLL frequency synthesizer according to a fifthembodiment of the invention;

FIG. 13 is a frequency characteristic graph which illustrates theoperation in the modulator according to the fifth embodiment;

FIG. 14 is a block diagram showing an exemplary configuration of awideband modulator using a PLL frequency synthesizer according to therelated art;

FIG. 15 is a frequency characteristic graph which illustrates theresults of examination by the inventor;

FIG. 15 is a frequency characteristic graph which illustrates theresults of examination by the inventor;

In the drawings, a numeral 1 represents a voltage-controlled oscillator(VCO), 2 a frequency divider, 3 a phase comparator, 4 a charge pump, 5 aloop filter, 6 a PLL (Phase-locked Loop), 7 a modulation data generator,8 a pre-distortion filter, 9 an adder, 10 a Σ Δ modulator, 11 an A/Dconverter (ADC), 12 a register, 13 comparison means, 14 filtercharacteristic control means, 15 a calibration data generator, 16 aselector, 17, 27 correction means, 18 a demodulator, 19 a low-passfilter, 20 a charge pump current control means, 31 a memory, 32 errordetection means, 33 a frequency characteristic correction means, 40 aselector, and 42 a modulating signal generator.

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiments of the invention are described below referring to thedrawings. In this embodiment, it is shown a constitutional example of amodulator capable of performing wideband modulation using a PLLfrequency synthesizer, which is used, for example, as a mobile radioterminal or a radio base apparatus of a mobile communication system.

First Embodiment

FIG. 1 is a block diagram showing the configuration of a widebandmodulator using a PLL frequency synthesizer according to a firstembodiment of the invention. FIGS. 2 and 3 illustrate the operation ofcalibration in the modulator shown in FIG. 1.

In the first embodiment, a basic configuration of the invention and itsfeature are clarified. The modulator according to this embodiment shownin FIG. 1 modulates the division ratio of a frequency divider in a PLLand the modulating signal appears on the control terminal of a VCO, as aresult of which a modulated carrier signal is output from the VCO.

As shown in FIG. 1, a PLL 6 comprises a voltage-controlled oscillator(hereinafter referred to as the VCO) 1, a frequency divider (variablefrequency divider having a division ratio of 1/N, where N is anarbitrary integer for convenience in the example of FIG. 1) 2, a phasecomparator 3 for comparing the phase of an output signal of thefrequency divider 2 and the phase of a reference signal to output aphase difference, a charge pump 4 for converting the output signal ofthe phase comparator 3 to a voltage or a current, and a loop filter 5for averaging the output signal of the charge pump 4.

The division ratio of the frequency divider 2 is modulated by amodulating signal DCR. Or, the modulating signal DCR itself indicates adivision ratio. The modulating signal DCR is generated by a modulatingsignal generator 42. It is possible to selectively input modulation datafrom a modulation data generator or calibration data from thecalibration data generator 15 to the modulating signal generator 42.

The modulating signal generator 42 comprises a pre-distortion filter 8which has an inverse characteristic to the frequency characteristic ofthe PLL 6 and which filters modulation data (or calibration data), anadder 9 for adding the frequency data specifying the output signalfrequency of the PLL 6 and the output signal of the pre-distortionfilter 8 and a Σ Δ modulator 10 for converting the output signal of theadder 9 to an output signal having the division ratio set to thefrequency divider 2 and outputting the resulting signal (or generating amodulation signal DCR).

In this type of modulator using a PLL, the average value of themodulating signal DCR must contain a fractional value in order toprovide modulation accuracy. This is made possible through a generallyknown fractional-N synthesis technique. In order to perform noiseshaving of a quantization noise which accompanies the fractional-Nsynthesis process, the Σ Δ A modulator 10 is provided.

In the modulator according to this embodiment shown in FIG. 1, themodulating signal DCR is used to modulate the division ratio of thefrequency divider 2. Thus, the modulating signal is overlaid on thefrequency control terminal of the VCO 1 via the frequency divider 2, thephase comparator 3, the charge pump 4 and the loop filter 5, and the VCO1 outputs a modulated carrier signal. That is, the voltage amplitude ofthe modulating signal appearing on the frequency control terminal of theVCO 1 represents the maximum frequency deviation of the modulatedcarrier signal as an output of the VCO 1.

Further, the modulator according to this embodiment comprises an A/Dconverter (ADC) 11, error detection means 32, a memory 31, and afrequency characteristic correction means 33 in order to correct adeviation between the frequency characteristic of a PLL and thefrequency characteristic of the pre-distortion filter 8. The modulatorcomprises a demodulator 18 as required.

In FIG. 1, a broken-line arrow indicates the path of a signal related tocorrection of the frequency characteristic.

Calibration data may be, for example, first calibration data of a lowerfrequency (fCAL: single frequency) than the cutoff frequency of the PLL6 and second calibration data of a higher frequency (fBW: singlefrequency) than the cutoff frequency of the PLL 6.

When the first calibration data is input to a modulating signalgenerator 42 via the selector 40, the ac (alternating current) componentof the frequency fCAL (below the cutoff frequency of the PLL 6)indicated by the first calibration data appears on the output of theloop filter 5. The amplitude value of the ac component is converted to adigital value by the A/D converter 11 and temporarily stored in thememory 31.

Next, when the second calibration data is input to a modulating signalgenerator 42 via the selector 40, the ac component of the frequency fBW(above the cutoff frequency of the PLL 6) indicated by the secondcalibration data appears on the output of the loop filter 5. Theamplitude value of the ac component of the output signal of the loopfilter is converted to a digital value by the AID converter 11 andtransmitted to the error detection means 32.

The error detection means 32 fetches the amplitude data of the accomponent of the frequency fCAL stored in the memory 31 and compares thefetched data with the amplitude data of the ac component of thefrequency F2 transmitted.

The calibration data has already undergone processing to increase thegain in the modulation band exceeding the cutoff frequency of the PLL 6.Ideally, the linearity of gain should be assured around the cutofffrequency of the PLL 6.

Theoretically, the amplitude value of the ac component of the frequencyf2 appearing on the output of the loop filter 5 should match theamplitude value of the ac component of the frequency fCAL mentionedabove. However, in reality, the frequency characteristic of the PLL 6varies due to a variation in the manufacture of circuit components,which causes an error.

As mentioned above, the voltage amplitude of a modulating signalappearing on the frequency control terminal of the VCO 1 represents amaximum frequency deviation of the modulated carrier signal as an outputof the VCO 1. Thus, a difference in the voltage amplitude value betweenthe ac component of the frequency fCAL and the frequency fBW appearingon the frequency control terminal of the VCO 1 represents a modulationerror, which directly leads to a drop in the modulation accuracy.

The error detection means 32 detects the difference (error) in thevoltage amplitude value of the ac component corresponding to thefrequencies fCAL, fBW It is thus possible to detect a difference in thegain characteristic of the frequency spectrum below and above the cutofffrequency of the PLL 6.

The result of error detection by the error detection means 32 isprovided to the frequency characteristic correction means 33. Thefrequency characteristic correction means 33 generates a control signalFCR for correction a gain difference. The control signal FCR is suppliedto the pre-distortion filter 8 or the charge pump as a component of thePLL 6.

As a result, the frequency characteristic (cutoff frequency) of thepre-distortion filter 8 or the volume of the current in the charge pump4 varies, which varies the cutoff frequency of the PLL 6.

In this way, a flat gain characteristic is provided even in a frequencyband (modulation band) exceeding the cutoff frequency of a PLL.

The ac component of the modulating signal DCR appearing on the output ofthe loop filter 5 can be reproduced by demodulating the output signal(frequency-modulated signal) of the VCO 1. Thus, similar frequencycharacteristic correction is made by demodulating the output signal ofthe VCO 1 and inputting the demodulated signal to the A/D converter 11instead of directly inputting the output signal of the loop filter 5 tothe A/D converter 11.

Specific operation of the first embodiment is described below referringto FIGS. 2 and 3.

Prior to calibration, frequency data (f1) is supplied to the modulatingsignal generator 42 as shown in FIG. 2 (f1 is not modulated) and acarrier signal of a frequency f1 is output from the VCO 1 while the PLLis being locked.

Then calibration is performed as shown in FIG. 3.

From the calibration data generator 15, first calibration data (havingthe information of fCAL as a frequency below the cutoff frequency fc ofthe PLL 6) is generated and the data is input to the pre-distortionfilter 8. The frequency input is below the cutoff frequency fc of thePLL 6 so that it is not amplified. A first calibration signal (having asignal amplitude of “S”) is output.

The division ratio of the frequency divider 2 is modulated by the firstcalibration signal. As mentioned above, the ac component of themodulating signal DCR appears on the frequency control terminal of theVCO 1. The ac component has a signal amplitude of “S”.

Similarly, second calibration data (having the information of fBW abovethe cutoff frequency fc of the PLL 6) is generated and the data is inputto the pre-distortion filter 8. The pre-distortion filter 8 expands(amplifies) the signal amplitude from “S” to “W” so as to compensate fora drop in the signal amplitude in the PLL 6.

The second calibration signal passes through the Σ Δ modulator 10 and isformed into a finer-gradation signal (the modulating signal DCR), whichis used to modulate the division ratio of the frequency divider 2.

The ac component of the modulating signal DCR appears on the frequencycontrol terminal of the VCO 1. The ideal signal amplitude of the accomponent is “S” although the actual amplitude is not “S” due to avariation in the frequency characteristic of the PLL.

The error detection means 32 detects a difference between amplitudevalues and varies the frequency characteristic (to be more specific,cutoff frequency) of the PLL 6 or the pre-distortion filter 8 in adirection the difference is eliminated.

In this embodiment, by way of the above operation, a flat gaincharacteristic is provided even in a frequency range exceeding thecutoff frequency of a PLL, thereby performing high-accuracy widebandmodulation.

Second Embodiment

FIG. 4 is a block diagram showing the configuration of a widebandmodulator using a PLL frequency synthesizer according to a secondembodiment of the invention. In the configuration of FIG. 4, samecomponents as those in the FIG. 1 are given same signs and numerals ingeneral.

A modulator according to the second embodiment uses as an input theoutput signal of the loop filter 5 and comprises correction means 27 foroutputting a control signal for correcting the frequency characteristic.The correction means 27 comprises, for example, an A/D converter (ADC)11 for converting an analog signal to a digital value, a register 12 forstoring the output signal of the A/D converter 11, comparison means 13for comparing the data stored in the register 12 with the output signalof the A/D converter 11, and a filter characteristic control means 14for controlling the characteristic of the pre-distortion filter 8 basedon the output signal of the compassion means 13.

The second embodiment further comprises a calibration data generator 15,a modulation data generator 7, and a selector (selection switch) 16 forselecting between the output signals of the calibration data generator15 and the modulation data generator 7 and outputting the selectedsignal to the pre-distortion filter 8.

While the configuration of the filter characteristic control means 14 isnot particularly limited, the filter characteristic control means 14comprises a ROM (lookup table) storing control data in this embodiment,as shown in FIG. 4.

Next, operation of the modulator according to the second embodiment isdescribed below. It is assumed that a deviation is present between thefrequency characteristic of the PLL 6 and that of the pre-distortionfilter 8 on the modulator according to the second embodiment, as shownin FIG. 16.

When the frequency data is updated, the output frequency of the VCO 1 ischanged to a target frequency, same as the well-known operation of aPLL. Phase lock takes place immediately after the change of frequency.Then calibration is performed in order to correct a deviation in thefrequency characteristic shown by the frequency characteristic Cx inFIG. 16.

FIGS. 5 through 7 are frequency characteristic graphs which illustratethe operation in the modulator according to the second embodiment.

After the phase lock, the calibration data generator 15 outputs a lowerfrequency (fCAL in this example) than the cutoff frequency as afrequency characteristic of the PLL as shown in FIG. 5. In this case,fCAL is set to a frequency below the variation range of the cutofffrequency which could take place due to a variation in the process ofmanufacturing of the loop filter 5.

The frequency component of fCAL, which is in the frequency band of thePLL 6, appears on the output of the loop filter 5. The amplitude of theac component of the frequency fCAL is converted to a digital value byway of the A/D converter 11 and is stored into the register 12. In FIGS.5 and 6, the frequency characteristic of the PLL 1, the frequencycharacteristic of the pre-distortion filter 8, and the synthesizedfrequency characteristic are A1, B1 and C1, respectively.

Next, the calibration data generator 15 outputs a frequency (fBW in thisexample) corresponding to the (upper limit of) the modulation bandwidthas shown in FIG. 6. The amplitude of the ac component of the frequencyEBW is converted to a digital value by way of the A/D converter againand the obtained value is output to the comparison means 13. Thecomparison means 13 compares the value with the amplitude level of thefrequency fCAL stored in the register 12 and outputs a comparisonresult.

As shown in FIG. 15, in case the frequency characteristic A of the PLL 6and the frequency characteristic B of the pre-distortion filter 8 arenot deviated from each other, the comparison error is 0 and thefrequency characteristic C of the synthesized frequency is flat. In casethere is a deviation as shown in FIG. 16, a comparison error occurs.

In case the frequency characteristic Al of the PLL is varied in a lowerrange as shown in FIG. 6 (the cutoff frequency is fc in FIG. 15 while itis fcx as a lower frequency in FIG. 6), the value of the ac component ofthe frequency fBW is smaller by DG than the value of the ac component ofthe frequency fCAL stored in the register 12.

FIG. 8 shows a deviation between the amplitude value of a modulatingsignal component above the cutoff frequency of a PLL and the amplitudevalue of a modulating signal component equal to or below the cutofffrequency. It is assumed that the modulating signal component (accomponent) of fCAL is output before the time t1 and the modulatingsignal component (ac component) of fBW is output after the time t1 inFIG. 8. In FIG. 8, amplitude values (peak values) have a difference ofDH.

In case the frequency characteristic of the PLL is varied in a higherrange, the value of the ac component of the frequency fBW is larger thanthe value of the ac component of the frequency fCAL stored in theregister 12. The filter characteristic control means 14 varies thecutoff frequency of the pre-distortion filter 8 so that the comparisonresult output from the comparison means 13 will be 0.

As shown in FIG. 7, calibration is complete when the comparison resulthas reached 0. Next, modulation data is output from the modulation datagenerator 7 and supplied to the pre-distortion filter 8. By synthesizingthe frequency characteristic A1 of the PLL 6 containing a deviation andthe frequency characteristic B2 of the post-correction pre-distortionfilter 8, the frequency characteristic C2 after synthesis is flattened.

In this way, according to the second embodiment, even in the presence ofa variation in the frequency characteristic of a PLL, the cutofffrequency of the pre-distortion filter 8 is varied to correct thevariation. This prevents degradation in the modulation accuracy.

The calibration signal is a single-tone (single-frequency) signal ratherthan a modulating signal. This assures high-accuracy comparison. Thecorrection error is reduced so that the modulation accuracy is improved.

Calibration is made after phase lock. Even in case the controlsensitivity (relationship of an oscillating frequency with respect to avoltage applied to a frequency control terminal; unit is Hz/V) of theVCO 1 varies for an oscillating frequency, calibration can eliminate thevariation. This further improves the modulation accuracy.

While the output of the loop filter 5 is converted to a digital value byway of the A/D converter 11 and a signal is generated which controls thepre-distortion filter 8 by using the register 12, the comparison means13, and the filter characteristic control means 14, anotherconfiguration may be employed as long as correction means having thesame functionality is used.

The filter characteristic control means 14 comprises a ROM (lookuptable) storing control data used to vary the cutoff frequency of thepre-distortion filter 8. This facilitates control of the pre-distortionfilter 8 and reduces the circuit scale, thereby reducing the overallcost. The filter characteristic control means 14 may not comprise a ROM.

The calibration signal is a single-tone signal rather than a modulatingsignal so that the loop filter 5 may be ac-coupled with the A/Dconverter 11. For example, in case ac coupling is made using a high-passfilter where the signal of the frequency fCAL passes, there is no needto allocate the number of bits of the A/D converter 11 to the dccomponent of the output of the loop filter 5, which improves theamplitude measurement accuracy of the calibration signal. Reducing thenumber of bits of the AID converter 11 can reduce the overall cost.

After the characteristic of the pre-distortion filter is varied andcalibration is over, operation of the A/D converter 11 may be halteduntil frequency data is updated next. This assures lower powerconsumption.

A pre-distortion filter is desirably an IIR filter. With an IIR filter,it is possible to provide a frequency characteristic having theamplitude and phase of a PLL by way of a digital filter, which improvesthe modulation accuracy.

Even in case a signal other than one having a single tone, such as amodulating signal is used as a calibration signal, correction means maybe provided which is capable of varying the frequency characteristic ofthe pre-distortion filter 8 by using the output signal of the loopfilter 5, in order to obtain the same effect.

Third Embodiment

FIG. 9 is a block diagram showing the configuration of a widebandmodulator using a PLL frequency synthesizer according to a thirdembodiment of the invention.

The third embodiment comprises a charge pump current control means forcontrolling the current gain of a charge pump 4 in accordance with theoutput of the comparison means 13 instead of a filter characteristiccontrol means 14. In this case, the charge pump 4 is a current outputtype. Other components are same as those in the second embodiment shownin FIG. 4.

In the third embodiment, a calibration data generator 15 outputs asignal having a frequency (fBW in this example) corresponding to themodulation bandwidth as shown in FIG. 6. Comparison means 13 comparesthe output of an A/D converter 11 and that of a register 12 and outputsa comparison result, same as the second embodiment.

Varying the current gain of the charge pump 4 can vary the frequencycharacteristic of a PLL 6. Charge pump current control means 20 variesthe current gain of the charge pump 4 so that the comparison resultoutput from the comparison means 13 will be 0, thereby correcting thefrequency characteristic of the PLL 6. As a result, as shown in FIG. 10,calibration is complete when the comparison result has reached 0. Thecalibration control signal is used to input a modulating signal outputfrom a modulation data generator 7 to a pre-distortion filter 8. Bysynthesizing the frequency characteristic A2 of the PLL 6 aftercorrection and the frequency characteristic B1 of the pre-distortionfilter 8, the frequency characteristic C2 after synthesis is flattened.

In this way, according to the third embodiment, even in the presence ofa variation in the PLL band, the frequency characteristic of a PLL isvaried by controlling the current of a charge pump in order to correctthe variation. This prevents degradation in the modulation accuracy.

Reduction of a circuit scale through fixed characteristic of thepre-distortion filter 8 is more advantageous than increase in the numberof circuits to vary the current gain of the charge pump 4. This reducesthe overall cost through circuit downsizing.

While the output of a loop filter 5 is converted to a digital value byway of the A/D converter 11 and a signal is generated which controls thecharge pump 4 by using the register 12, the comparison means 13, and thecharge pump current control means 20, another configuration may beemployed as long as correction means having the same functionality isused.

The charge pump current control means 20 may comprise a ROM storingcontrol data used to vary the current gain of the charge pump 4. Thisfacilitates control of the charge pump 4 and reduces the circuit scale,thereby reducing the overall cost.

A modulator according to the invention may comprise both the charge pumpcurrent control means 20 of the third embodiment and the filtercharacteristic control means 14 of the second embodiment whichrespectively control the current gain of the charge pump 4 and thecutoff frequency of the pre-distortion filter 8.

In this case, it is possible to simultaneously vary the frequencycharacteristic of a PLL and that of a pre-distortion filter. Thisimproves the calibration accuracy thereby improving the modulationaccuracy.

Even in case a signal other than one having a single tone, such as amodulating signal is used as a calibration signal, correction means maybe provided which is capable of varying the current gain of the chargepump 4 by using the output signal of the loop filter 5, in order toobtain the same effect.

Fourth Embodiment

FIG. 11 is a block diagram showing the configuration of a widebandmodulator using a PLL frequency synthesizer according to a fourthembodiment of the invention.

The fourth embodiment comprises a demodulator 18 for demodulating theoutput signal of a VCO 1 instead of using the output signal of a loopfilter 5 as an input to an A/D converter 11. This embodiment uses theoutput of the demodulator 18 as an input to the A/D converter 11. Othercomponents are same as those in the second embodiment shown in FIG. 4.

In the fourth embodiment, a calibration signal can be demodulated by thedemodulator 18. By inputting the demodulated signal to the A/D converter11, calibration is performed, same as the second embodiment.

After the characteristic of the pre-distortion filter is varied andcalibration is over, operation of the A/D converter 11 may be halteduntil frequency data is updated next. This assures lower powerconsumption.

In this way, according to the fourth embodiment, even in the presence ofa variation in the frequency characteristic of a PLL, the cutofffrequency of the pre-distortion filter 8 is varied to correct thevariation. This prevents degradation in the modulation accuracy.

In the third embodiment shown in FIG. 9, a demodulator 18 fordemodulating the output signal of the VCO 1 may be provided instead ofusing the output signal of the loop filter 5 as an input to the A/Dconverter 11, in order to obtain the same effect.

Fifth Embodiment

FIG. 12 is a block diagram showing the configuration of a widebandmodulator using a PLL frequency synthesizer according to a fifthembodiment of the invention.

In the fifth embodiment, a PLL 33 comprises a low-pass filter 19. ThePLL 33 directs the output of a loop filter 5 to the frequency controlterminal of a VCO 1 via the low-pass filter 19. Other components aresame as those in the second embodiment shown in FIG. 4.

A pre-distortion filter 8 has a frequency characteristic inverse to thatof the loop filter 5, same as the second embodiment. The cutofffrequency of the low-pass filter 19 is higher than the modulation band.

FIG. 13 shows a frequency characteristic of the modulator according tothe fifth embodiment. The frequency characteristic A3 of the PLL 33 issynthesized with the characteristic of the low-pass filter 19 so thatthe attenuation slop becomes steep as the frequency fBW in themodulation band is exceeded. Thus, the frequency characteristic C3obtained after synthesis with the frequency characteristic B2 of thepre-distortion filter 8 shows an increase in the attenuation volume pastfBW.

In this way, according to the fifth embodiment, the PLL 33 comprises thelow-pass filter 19, which improves the noise characteristic in afrequency band higher than the modulation band.

The same effect is obtained by adding the low-pass filter 19 to each ofthe first through fourth embodiments.

As mentioned above, according to this embodiment, even in the presenceof a variation in the frequency characteristic due to a variation in themanufacture of circuit components, a flat gain characteristic isprovided even in a frequency band exceeding the cutoff frequency of thePLL by varying and correcting the frequency characteristic of at leastone of a PLL and a pre-distortion filter. This prevents degradation inmodulation accuracy even in the presence of a variation in themanufacture of circuit components, thereby allowing high-accuracywideband modulation.

While the invention has been described in detail and referring tospecific embodiments, those skilled in the art will recognize thatvarious changes and modifications can be made in it without departingfrom the spirit and scope thereof

This patent application is based on Japanese Patent Application No.2003-002501, the disclosure of which is incorporated herein byreference.

INDUSTRIAL APPLICABILITY

As mentioned hereinabove, according to the invention, it is possible toprovide a modulator capable of performing wideband modulation which canprevent degradation in the modulation accuracy even in the presence of avariation in the manufacture of circuit components.

1. A modulator comprising: a PLL including a voltage-controlledoscillator, a frequency divider and a phase comparator, said modulatorgenerating a modulating signal based on the modulation data havinginformation on a wider bandwidth than the frequency bandwidth of thePLL, setting the division ratio of said frequency divider by way of thismodulating signal, and outputting a modulated carrier signal from saidvoltage-controlled oscillator as well as performing filtering processingby way of a pre-distortion filter on said modulation data to provide afrequency characteristic inverse to the frequency characteristic of saidPLL in a process of generating said modulation signal, thereby allowingwideband modulation, wherein said modulator comprises: error detectionmeans for detecting a difference between an amplitude value in afrequency equal to or below the cutoff frequency of said PLL and anamplitude value in a frequency higher than said cutoff frequencyconcerning an ac component of said modulating signal appearing on acontrol terminal of said voltage-controlled oscillator, and frequencycharacteristic correction means for correcting at least one of thefrequency characteristic of said PLL and the frequency characteristic ofsaid pre-distortion filter in a direction said detected difference iseliminated.
 2. The modulator according to claim 1, said modulatorcomprising a selector for selectively inputting, as said modulationdata, first calibration data on a frequency equal to or below the cutofffrequency of said PLL and second calibration data on a frequency abovethe cutoff frequency of said PLL.
 3. A modulator comprising: a PLLincluding, a voltage-controlled oscillator for outputting a modulatedcarrier signal, a frequency divider for dividing the frequency of anoutput signal of said voltage-controlled oscillator by a modulateddivision ration, a phase comparator for comparing the phase of theoutput signal of said frequency divider and the phase of a referencesignal and outputting the phase difference, a charge pump for convertingthe output signal of said phase comparator to a voltage or a current,and a loop filter for performing low-pass filtering of the output signalof said charge pump and outputting the resulting signal to saidvoltage-controlled oscillator; a modulation data generator forgenerating and outputting modulation data having the information on awider bandwidth than the bandwidth of said PLL; a pre-distortion filterwhich has a characteristic inverse to the frequency characteristic ofsaid PLL approximated and which filters said modulation data; divisionratio modulation means for modulating the output signal of saidpre-distortion filter and outputting the resulting output signal as amodulating signal used to set the division ratio of said frequencydivider; and a pre-distortion filter frequency characteristic correctionmeans for outputting a control signal for varying the frequencycharacteristic of said pre-distortion filter.
 4. The modulator accordingto claim 3, said modulator comprising: a calibration data generator forgenerating and outputting, to said pre-distortion filter, firstcalibration data having the frequency information on the frequency bandof said PLL and second calibration data having the frequency informationon the band outside the frequency band of said PLL, wherein saidpre-distortion filter frequency characteristic correction meanscomprises: an A/D converter for converting to a digital signal theamplitude value of an ac component having the division ratio modulatedby said division ratio modulation means appearing on the output of saidloop filter in response to said first and second calibration datarespectively; comparison means for comparing the data of said twoamplitude values output from said A/D converter and outputting thedifference information; and filter characteristic control means forvarying the characteristic of said pre-distortion filter in accordancewith said difference information output from said comparison means. 5.The modulator according to claim 3, said modulator comprising: acalibration data generator for generating and outputting, to saidpre-distortion filter, first calibration data having the frequencyinformation on the frequency band of said PLL and second calibrationdata having the frequency information on the band outside the frequencyband of said PLL and a demodulator for demodulating the output signal ofsaid voltage-controlled oscillator, wherein said pre-distortion filterfrequency characteristic correction means comprises: an A/D converterfor converting to a digital signal the amplitude value of an accomponent having the division ratio modulated by said division ratiomodulation means appearing on the output of said loop filter in responseto said first and second calibration data respectively; comparison meansfor comparing for comparing the data of said two amplitude values outputfrom said A/D converter and outputting the difference information; andfilter characteristic control means for varying the characteristic ofsaid pre-distortion filter in accordance with said differenceinformation output from said comparison means.
 6. A modulatorcomprising: a PLL including, a voltage-controlled oscillator foroutputting a modulated carrier signal, a frequency divider for dividingthe frequency of an output signal of said voltage-controlled oscillatorby a modulated division ration, a phase comparator for comparing thephase of the output signal of said frequency divider and the phase of areference signal and outputting the phase difference, a charge pump forconverting the output signal of said phase comparator to a voltage or acurrent, and a loop filter for performing low-pass filtering of theoutput signal of said charge pump and outputting the resulting signal tosaid voltage-controlled oscillator; a modulation data generator forgenerating and outputting modulation data having the information on awider bandwidth than the bandwidth of said PLL; a pre-distortion filterwhich has a characteristic inverse to the frequency characteristic ofsaid PLL approximated and which filters said modulation data; divisionratio modulation means for modulating the output signal of saidpre-distortion filter and outputting the resulting output signal as amodulating signal used to set the division ratio of said frequencydivider; and a PLL frequency characteristic correction means foroutputting a control signal for varying the current gain of said chargepump.
 7. The modulator according to claim 6, said modulator comprising:a calibration data generator for generating and outputting, to saidpre-distortion filter, first calibration data having the frequencyinformation on the frequency band of said PLL and second calibrationdata having the frequency information on the band outside the frequencyband of said PLL, wherein said PLL frequency characteristic correctionmeans comprises: an A/D converter for converting to a digital signal theamplitude value of an ac component having the division ratio modulatedby said division ratio modulation means appearing on the output of saidloop filter in response to said first and second calibration datarespectively; comparison means for comparing the data of said twoamplitude values output from said A/D converter and outputting thedifference information; and charge pump current control means forvarying the current gain of said charge pump in accordance with saiddifference information output from said comparison means.
 8. Themodulator according to claim 6, said modulator comprising: a calibrationdata generator for generating and outputting, to said pre-distortionfilter, first calibration data having the frequency information on thefrequency band of said PLL and second calibration data having thefrequency information on the band outside the frequency band of said PLLand a demodulator for demodulating the output signal of saidvoltage-controlled oscillator, wherein said PLL frequency characteristiccorrection means comprises: an AID converter for converting to a digitalsignal the amplitude value of an ac component having the division ratiomodulated by said division ratio modulation means appearing on theoutput of said loop filter in response to said first and secondcalibration data respectively; comparison means for comparing the dataof said two amplitude values output from said A/D converter andoutputting the difference information; and charge pump current controlmeans for varying the current gain of said charge pump in accordancewith said difference information output from said comparison means. 9.The modulator according to any one of claims 3 through 5, wherein saidfilter characteristic control means comprises a memory for storingcontrol data used to change the frequency characteristic of saidpre-distortion filter.
 10. The modulator according to any one of claims6 through 8, wherein said charge pump current control means comprises amemory for storing control data used to change the frequencycharacteristic of said PLL.
 11. The modulator according to any one ofclaims 3 through 10, wherein a low-pass filter is provided having ahigher cutoff frequency than the bandwidth of said modulating signalbetween the output end of said loop filter and the input end of saidvoltage-controlled oscillator.
 12. The modulator according to any one ofclaims 4, 5, 7 and 8 through 11, wherein said first and secondcalibration data have a single frequency information item.
 13. Themodulator according to any one of claims 4, 5 and 9, wherein, in saidpre-distortion filter frequency characteristic correction means, saidcomparison means compares the amplitude values of an ac component havingthe division ratio modulated by said division ratio modulation meansappearing on the output of said loop filter in response to said firstand second calibration data respectively, immediately after varying theoutput frequency of said voltage-controlled oscillator, and said filtercharacteristic control means varies the characteristic of saidpre-distortion filter in accordance with said comparison result.
 14. Themodulator according to claim 4 or 7, wherein said loop filter and saidA/D converter are ac-coupled with each other.
 15. The modulatoraccording to claim 4 or 5, wherein said modulator halts the operation ofsaid A/D converter after varying the characteristic of saidpre-distortion filter.
 16. The modulator according to claim 5, whereinsaid modulator halts the operation of said demodulator after varying thecharacteristic of said pre-distortion filter.
 17. The modulatoraccording to any one of claims 3 through 16, wherein said pre-distortionfilter is an IIR-type digital filter.
 18. A mobile radio unit comprisingthe modulator according to any one of claims 1 through
 17. 19. A radiobase station comprising the modulator according to any one of claims 1through
 17. 20. A method for correcting a modulator which generates amodulating signal based on the modulation data having information on awider bandwidth than the frequency bandwidth of the PLL, sets thedivision ratio of said frequency divider by way of this modulatingsignal, and outputs a modulated carrier signal from saidvoltage-controlled oscillator as well as performs filtering processingby way of a pre-distortion filter on said modulation data to provide afrequency characteristic inverse to the frequency characteristic of saidPLL in a process of generating said modulation signal, thereby allowingwideband modulation, wherein said method comprises an error detectingstep of detecting a difference between an amplitude value in a frequencyequal to or below the cutoff frequency of said PLL and an amplitudevalue in a frequency higher than said cutoff frequency concerning an accomponent of said modulating signal appearing on a control terminal ofsaid voltage-controlled oscillator, and a frequency characteristiccorrecting step of correcting at least one of the frequencycharacteristic of said PLL and the frequency characteristic of saidpre-distortion filter in a direction said detected difference iseliminated.